Many electronic systems use a series string power supply architecture. The basic concept is that a fixed-voltage variable-current dc power supply unit (PSU) producing a relatively high output voltage is connected to the power plane of the first load element in the series string, and the ground plane of the first load element is then connected to the power plane of a second load element. This stair-step supply voltage arrangement may be repeated multiple times, with the final load element's ground plane being connected back to the PSU's ground plane, thus completing the circuit. See FIG. 1.
The series string architecture provides an inexpensive but rather inflexible voltage regulation mechanism. That is, the voltage across the entire series string is necessarily equal to the voltage provided by the PSU, but the voltage across any individual load element in the series string may fluctuate. Individual load voltages may be determined by simple voltage division while the series string current remains constant. In some use scenarios, all the load elements in the series string may be identical, in which case the voltage across any one load element is simply the PSU voltage divided by the number of load elements in the series string.
Microprocessors have been increasing in sophistication over time, and now often feature multiple processor cores on a single integrated circuit die. Newer microprocessors generally require lower power supply voltages than older microprocessors. This supply voltage reduction is largely due to the smaller transistors from which today's microprocessors are manufactured, and the higher speeds at which those transistors are required to change states. A series string of several modern microprocessors may theoretically be powered by a supply voltage that once powered a smaller number of microprocessors in the past. Similar changes are occurring in the lighting field, where a supply voltage that once powered a small number of incandescent bulbs can now power a larger number of high-efficiency light-emitting diodes in a series string.
The inability of the simple series string architecture to precisely control individual load voltages may cause problems when the load elements are more dynamic in their behavior. This is typically the case with computing devices, such as microprocessors or processor cores (and may also sometimes occur with lighting devices). The effective electrical resistance of an individual computing load element may vary substantially, both statically due to normal variances in its electrical characteristics and dynamically due to its computational activity level. Active processors typically draw more current than inactive processors, so have a lower effective electrical resistance as seen by a power supply. Since the current flowing in the series string is the same for all individual load elements, fluctuations in any load element's effective resistance may lead to fluctuations in all of the individual load element supply voltages.
The conventional series string architecture may therefore be inadequate for the supply voltage sensitivities of series strings that include particularly dynamic load elements. Modern microprocessors may not function properly when their individual supply voltages vary significantly, for example, due to changes in the activity level of one or more load elements in the series string. Uncontrolled changes in the supply voltage across any given load element in the series string could cause load element damage or even failure of the entire series string.
The present inventors therefore seek to solve the technical problem of precisely yet inexpensively powering a number of electrical load elements that are connected in series. This problem arises in several different scenarios, including but not limited to powering a plurality of microprocessors in a computer system or a plurality of light-emitting devices in a lighting appliance as previously noted. The problem is also important in blockchain processing, such as in cryptocurrency management, where engineers seek to minimize overall power consumption for a variable computational workload performed by a potentially large number of processing cores that may be distributed across multiple integrated circuits.